CPU 31-10 (CPD2)

CompactPCI/PICMG 2.16 Core2 Duo Single Board Computer


CPU 31-10
(click to enlarge)

Features

  • CPCI and PICMG 2.16 compatible
  • Intel® Core™2 Duo Mobile Processor L7400 @ 1.5 GHz or T7400 @ 2.16 GHz
  • Supports two PMC sites, one of which optionally supports XMC modules
  • E7520 Chipset for PCIe support and high memory bandwidth
  • 16 GB bootable Flash
  • Available in convection-cooled or conduction-cooled versions
  • Also available in rugged, conduction-cooled versions

The CPU 31-10 is a 6U single-slot Compact PCI (PCMG 2.16 compatible) platform based on the Intel® Core™2 Duo Mobile Processor L7400 at 1.5 GHz or the T7400 at 2.16 GHz . The CPU 31-10 takes advantage of the Core2-Duo’s low 17 W power consumption (at 1.5 GHz) as a rugged Single Board Computer (SBC) and it is optionally available as a conduction-cooled Compact PCI module with wedge locks and a full-board heat sink for high shock/vibration environments and temperature extremes. For the conduction-cooled version, see CRD2.

The E7520 Memory Controller Hub (MCH) and 6300ESB I/O Controller Hub (ICH) chipset supports PCI-X and PCIe expansion, USB 2.0, ATA/100, and Serial ATA (SATA). Two Gb Ethernet ports and two USB 2.0 ports are accessible from the front panel in addition to two PMC bezels. 16 GB of on-board Flash permits single-slot booting. Two PICMG 2.16-compliant, 10/100/1000BaseTX ports are routed to the backplane. Two SATA ports, VGA video,up to four COM ports, an optional IDE interface, PS/2 mouse & keyboard, and two more USB 2.0 ports are routed to the backplane. Two PMC-X site is provided for additional I/O expansion. One of the sites is XMC compatible and supports x8 PCIexpress. Conventional PC I/O is accessible with industry-standard connectors on optional rear I/O modules.

Changes from the CPD
The CPU 31-10 is a form/fit/function replacement to the CPD. While all I/O interfaces are unchanged, the redesign addressed a few key issues to improve the capabilities of the CPD as follows:

Each PMC module now interfaces directly to the E7520 MCH via a Tsi384 PCIe to PCI-X bridge. By converting x4 PCI Express to PCI-X at 64-bit and 133MHz, each PMC can now realize a bandwidth of 1 GB/sec. The CPD had both PMC cards routed from the 6300 I/O controller hub. By routing PMC modules directly to the E7520, the CPU 31-10 offers much greater bandwidth between PMC and processor and PMC and memory. This change takes advantage of higher performance PMC modules. The XMC interface continues to be x8 PCI Express direct from the E7520. These changes will have no impact on application software already developed for the CPD.

A second change from the CPD is the elimination of CompactFlash and its replacement with 16 GB of soldered NAND Flash. This makes the CPU 31-10 more rugged, and provides higher performance Flash at less cost.


CPU 31-10 Block Diagram
Click Images to Enlarge

Two Different RTM Options

XPD-RIO Rear Transition Module
(click to enlarge for inteface description)


XPD-RIO2 Rear Transition Module
(click to enlarge for inteface description)

 

 


 

Technical Specifications
Core™2 Duo Mobile Processor L7400

1.5 GHz or 2.16 GHz, 479-pin uFC-BGA Core 2 Duo manufactured with low-power 65 nm process

4 MB L2 Cache

667 MHz front side bus

64-bit OS and application support

Single-slot Operation Single-slot CompactPCI operation with 16 GB on-board Flash disk for bootable mass storage
E7520 & 6300ESB Chipset

Two x4 PCI Express interfaces are routed to two dual Gb Ethernet controllers

Two x4 PCI Express interfaces are routed to the two PMC sites via two Tsi384 PCIe to PCI-X bridges. This provides each PMC site with a dedicated 64-bit 1333 MHz PCI-X bus with a 1 GB bandwidth.

One x8 PCI Express interfaces is routed to an XMC site

DDRR2-400 DRAM interface with a max memory bandwidth of 6.4 GB/second

Four USB 2.0 Ports

PATA/100 and SATA/150 support

PCI-X 64/66 for the PLX PCI6466 PCI/PCI bridge

PCI 32/33 for SM712 VGA controller

DRAM

2 or 4 GBytes of DDR2-400 memory

Two banks that are each 64 bits wide with 8 bits for ECC support

CompactPCI PICMG 2.0 R3.0 Compliant
PLX non-transparent PCI-PCI bridge provides 64-bit CompactPCI transfer rates at 66 MHz
Universal bridge lets the CPU 31-10 operate as a system
controller or a peripheral slot module
Supports Hot Swapping according to PICMG 2.1 R2.0
Connectors J3 and J5 are used for I/O expansion - J4 is not populated
PMC Expansion

Two PMC sites each with a dedicated 64-bit 133 MHz PCI-X bus interfaced to the E7520 via two separate Tsi384 PCIe to PCI-X bridges. This architecture eliminates potential bottlenecks and provides 1 GB access to E7520.

One of PMC sites also supports XMC modules with x8 PCIe

Ethernet/
PICMG 2.16

Two Intel 82571EB dual PCI express Ethernet controllers provide a total of four 10/100/1000BaseTX Ethernet ports. Two are routed to the front panel. Two are routed to the J3 connector in compliance with PICMG 2.16 for backplane fabric switching or for alternate routing to an optional rear I/O card
Graphics

The Silicon Motion SM712 ultra low-power display controller with 4 MB on-chip memory.

VGA routed to J5

IDE/Flash

Primary ATA/100 DMA IDE interface is optionally accessible from the J5

Secondary IDE port is routed to a Silicon Motion SM2231 NAND Flash controller. 16 GB of NAND Flash is installed.

IPMI ATmega 128L IPMI controller runs Pigeon Point IPM Sentry Software. Optional COM4 connection for payload interface
BIOS General Software's flash-based system BIOS with a
variety of boot options including CD-ROM, USB, and PXE over Ethernet
Customized versions can be provided
Watchdog Programmable watchdog timer for system recovery
I/O interfaces accessible from the front panel Dual 10/100/100BaseTX, Dual USB 2.0, access to both PMC sites
I/O interfaces routed to both optional rear plug-in boards

VGA, IDE, COM1/2/3/4, dual Serial ATA, keyboard/mouse, and dual USB 2.0 ports (routed through J5)
Access to both PMC sites
Two Gb Ethernet ports in compliance with PICMG 2.16 (routed through J3)

XPDRIO

Rear Transition Module

Optional rear I/O interface board (RTM) with:
• One USB connector
• 40-pin IDE connector
• Two RJ-45 connectors for Gb Ethernet
• One SATA connector
• COM 1,2,3,4 connector (COM3 has RS-422 option)
• PS/2 keyboard mouse
• VGA
• Audio In and Out
• Two optional PMC Interface (PIM) Modules
Photo of XPDRIO

XPDRIO2

Rear Transition Module

Optional rear I/O interface board (RTM) with:
• Two USB connectors
• Optional 40-pin IDE connector
• Two RJ-45 connectors for Gb Ethernet
• One SATA connector on front panel plus a 1.8" SATA drive connector for mounting onboard
• COM 1,2 optional COM3, 4 (COM3 has RS-422 option)
• PS/2 keyboard mouse option
• VGA
• Two optional PMC Interface (PIM) Modules
Photo of XPDRIO2

Operating temperature

The CPM1 has a standard operating temperature range of 0°/+70° C
Extended temp versions are available

Net Weight Approximately 15 oz with convection-cooled heatsink and no CF installed
Rugged/Conduction-cooled Versions CRD2 is a conduction-cooled version of the CPU 31-10
Stiffener bar enables high shock/vibration immunity per MIL-STD-810F
Convection-cooled and conduction-cooled versions have conformal coating as an option
Power Consumption

1.5 GHz Core2 Duo

+5VDC @5.5A, peak
3.3VDC @ 2.0 A steady
3.0VDC Lithium Coin Cell @3.4 µA

2.16 GHz Core2 Duo +5VDC @8.0A, peak
3.3VDC @ 2.0 A steady
3.0VDC Lithium Coin Cell @3.4 µA peak
 
Core™2 Duo Mobile Processor L7400 or T7400
Delivering breakthrough energy efficient performance for embedded platforms. 65 nm process technology makes it possible to integrate two complete execution cores in one physical package, providing advancements in simultaneous computing for multi-threaded applications and multitasking environments. While incorporating advanced technology these CPUs remain software compatible with previous IA-32 processors. Execute four instructions per cycle to improve execution speed and efficiency using 14-stage pipeline. Support 64-bit instructions, providing flexibility for 64-bit and 32-bit applications and operating systems.
 
Chipset
The Intel E7520 chipset acts as the central hub for all data passing between the core system elements including processor, memory, PCI Express I/O, and legacy I/O subsystems. The Intel® E7520 chipset enables a variety of high-performance, low-power designs with improved platform reliability and system manageability. This chipset utilizes revolutionary PCI Express serial I/O technology and DDR2 memory technology to help increase I/O bandwidth and reduce system latency for data-intensive applications. The 533 MHz bus allows this chipset to support Intel® Core-Duo processors.
 
The Intel® 6300ESB I/O Controller Hub (ICH) supports legacy and more cutting edge I/O. It is designed for use with the Intel® MCH. Intel has integrated features into the ICH that offer the performance, stability and reliability customers require for embedded computing applications. It improves bandwidth via PCI-X 64/66 support. It also provides port 60/64 emulation, dual UARTs, four USB 2.0 ports, two SATA ports, primary and secondary IDE, and a two-stage watchdog timer.
DRAM
The CPU 31-10 supports supports 2 or 4 GBytes of DRAM and its DDR2-400 memory technology is ideal for memory-intensive applications. The memory subsystem interface to E7520 is dual channel, for a total system bandwidth of up to 6.4 GB/second. ECC error correction is supported.
 
Four Gb Ethernet Ports
Two are accessible from the front panel while the other two are routed to the J3 connector in compliance with PICMG 2.16. The CPU 31-10 gets its four Ethernet ports from two Intel® 82571EB Gigabit Ethernet Controllers. The 82571EB provides two fully integrated Gigabit Ethernet Media Access Control (MAC) and physical layer (PHY) ports. This device uses the PCI Express architecture (Rev. 1.0a) as a host interface. The Intel 82571EB supports Ethernet interfaces for 1000BASE-T, 100BASE-TX, and 10BASE-T applications. In addition to managing MAC and PHY Ethernet layer functions, the controller manages PCI Express packet traffic across its transaction, link, and physical/logical layers.
 
 
 
CPU 31-10 I/O Routing
I/O Front Panel***
Through J3
Through J5
PS/2 Mouse/Kybd     1
1 Gb LAN (4 total) 2 2 (PICMG 2.16)  
COM Ports     COM1/2, COM3/4 *
VGA Graphics     1
USB 2.0 2   2
Serial ATA     2
IDE Interface     1 *
PMC I/O** 2

1 PMC
PICMG 2.3 R1.0 PMC

1 PMC/XMC *

* represents optional routing. XMC/PMC routed to J5 may conflict with either IDE, COM 3/4, or IDE routing to J5

** Both PMC(XMC) site I/O is also accessible through front panel on convection-cooled (CPU 31-10) versions

*** Front panel I/O not available on conduction-cooled versions

Ordering Information

Part#
Description
CPU 31-10-00 1.5 GHz Core2Duo, 2 GB DRAM memory down, No NAND Flash, 0 to +70C - Convection cooled
CPU 31-10-01 1.5 GHz Core2Duo, 2 GB DRAM memory down, No NAND Flash, -40 to +85C - Convection cooled
CPU 31-10-02 1.5 GHz Core2Duo, 2 GB DRAM memory down, No NAND Flash, -40 to +85C - Conduction cooled
   
CPU 31-10-03 1.5 GHz Core2Duo, 4 GB DRAM memory down, No NAND Flash, 0 to +70C - Convection cooled
CPU 31-10-04 1.5 GHz Core2Duo, 4 GB DRAM memory down, No NAND Flash, -40 to +85C - Convection cooled
CPU 31-10-05 1.5 GHz Core2Duo, 4 GB DRAM memory down, No NAND Flash, -40 to +85C - Conduction cooled
   
CPU 31-10-06 2.16 GHz Core2Duo, 4 GB DRAM memory down, No NAND Flash, 0 to +70C - Convection cooled
CPU 31-10-07 2.16 GHz Core2Duo, 4 GB DRAM memory down, No NAND Flash, ext temp range - Convection cooled
CPU 31-10-08 2.16 GHz Core2Duo, 4 GB DRAM memory down, No NAND Flash, ext temp range - Conduction cooled
   
BM10 31-11-00 Conformal coating option for CPU-31-10 - Factory option - MOQ 3
BM10 31-11-01 16GB NAND Flash expansion for CPU-31-10 - Factory option ext temp range

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